FU Berlin, Fachbereich Mathematik und Informatik, Institut für Informatik
From microscale to nanoscale CMOS devices: extending the limits of CMOS technology
Prof. Dr. Jan van der Spiegel, Department of Electrical and Systems Engineering, University of Pennsylvania
The talk will discuss how CMOS device "scaling" has brought microelectronics into the "nanoscale" regime and has allowed the fabrication of ultra fast transistors and integrated circuits of ever increasing computational power, as expressed by Moore's law. However, further reduction of the device dimensions will pose serious challenges in terms of power dissipation, reliability and manufacturing complexity. We will discuss these limitations and possible solutions in order to extend classical CMOS transistors deep into the nanoscale regime. This includes the use of silicon-germanium, silicon-on-insulator, double-gate FET as well as new photolithographic techniques to obtain feature sizes below the diffraction limit. The talk will finish with a brief discussion of the theoretical limits of CMOS scaling and an overview of emerging new device structures.
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